Next Gen Semi Design (part 9) – Risks

In the last post two posts on semiconductor design I reviewed the risks to Altera and Xilinx due to competition from other platforms, existing competitors, and new entrants. Here I’ll review the risks from reliance on the communication sector (which may finally be a strength for the first time since early 2000) and from ASIC vendors.

Competition from Structured ASICS and ASSP’s

In March 2006, LSI Logic, the first vendor to create a structured ASIC, closed its RapidChip division exiting the structured ASIC business. This was a blow to the EDA vendors who haven’t seen significant growth since the 2001 downturn and have struggled to gain a foothold in the FPGA industry. By shuttering its structured ASIC division LSI conceded that customers are moving to FPGA’s for new products as it is much faster and more economical to initially design a Xilinx (or Altera) FPGA and migrate to the same vendor’s structured ASIC in volume, than design using LSI’s ASIC-based process.

In 2001, Altera introduced their HardCopy® structured ASIC platform and they are now a leader in the structured ASIC market. Altera has a straightforward migration path from FPGA to structured ASIC. They maintain compatibility with the FPGA architecture, but reduce the die size by removing the configuration circuitry, programmable routing, and programmability for logic and memory with fixed wired interconnect. Xilinx has a similar product called EasyPath®.

Reliance on Communications Sector

In 2000, over 80% of PLDs went into communications related equipment. Today that number is just under 50% of sales and steadily dropping. Since 2000 the growth in PLDs for communications end products has significantly trailed other end markets.

In fact, if the growth in the communication sector picks up, like we think it will in 2010 or 2011, this could be a major boost to the PLD market. The other end market segments like storage, industrial, and consumer electronics should continue to see strong growth over the next decade.

Next Gen Semi Design (part 8) – Risks

In the last post I reviewed the risks to Altera and Xilinx due to competition from other platforms. In this post I’ll review the risks from existing competitors and new entrants.

PLD Market: Existing Competitors Gain Momentum

Actel with 6% market share has a strong niche in anti-fuse FPGAs (one time programmable) and in flash based FPGAs. Flash based FPGAs is a segment Xilinx and Altera have stayed away from, but February 2007 Xilinx’s introduced a flash-based Spartan-3AN and was named to EDN’s Hot 100 Products of 2007.

There have been many new entrants with Flash based FPGAs in recent years as venture capitalists and entrepreneurs may feel more compelled to compete in a corner of the market not dominated by one of the two industry leaders. Flash-based FPGAs have entering several new markets end markets and they may actually grow faster than the more traditional SRAM-based FPGAs.

Actel began shipping a Flash based FPGA in 1999 and they appear to currently have a strong leadership position in this good niche area of the FPGA market. Actel has a deal with ARM for putting soft versions of ARM7 processors in Actel’s non-volatile flash-based FPGAs. Altera recently began offering FPGAs that also support ARM processors.

Flash benefits from being non-volatile (e.g. it doesn’t need power to maintain the chip’s data), but SRAM devices will always be faster. Unlike SRAM based FPGAs, Flash based FPGAs do not have to be booted by an external device to load the software so they are more of a true single chip solution comparable to ASICs (related to power requirements and the number of components in circuit board design).

Lattice Semiconductor with 7% market share has made acquisition to attempt to increase its share in the PLD market. Having these diverse PLD software development platforms for its various acquisitions has been a disadvantage. In 2001, Lattice’s division Vantis and Agere (at the time Lucent) gave it a 25% market share in the PLD market. Lattice is strongest in the slower growing CPLD segment where it is number three in market share after being over taken by Xilinx in 2007 for the number two position. Altera is number one in CPLD market share.

QuickLogic with 1% market share targets specific applications (similar to ASSP’s) and is strong in power sensitive markets.

PLD Market: New Entrants

Newer companies such as ChaoLogix, Stretch, and Cswitch are entering the programmable logic space and trying to create a disruptive, game changing technology.

A big problem for start-ups and other semiconductor companies entering the programmable logic market is place and route tooling software, where Xilinx and Altera’s design platforms are dominant. Roelandts the CEO of Xilinx has stated that “there is no 3rd party place and route software; place and route software at Xilinx runs to 20 million lines of code.” A new company also runs into the problem that initially no one knows its development platform and the lack of IP available for the startups chips.

A larger better funded player like Intel, IBM, or Texas Instruments enters the market. With the Geneseo project Intel and IBM opened sourced what could have been a competitive advantage for them (discussed in a couple pages). A risk could be a strong player like Texas Instruments, with its current powerful position in analog and DSP, purchasing Actel to get a foothold in the PLD market.

Next Gen Semi Design (part 7) – Risks

In the next four blog posts on the next generation of semiconductor design I will go over the potential risks to Xilinx and Altera’s platform. In this post I’ll review the risks stemming from potential competition from other platforms.

Who has the best platform for the next generation of semiconductor devices: Intel, TI, IBM, Xilinx, Altera, ARM Holdings, Analog Devices, Microchip Technology, etc? What platform will large companies and entrepreneurs use to build the next generation of products?

One-time programmable processors are one source of competition for embedded system solutions; with Microchip Technology’s programmable microcontrollers and TI’s DSP platform.

Many entrepreneurs love Microchip Technology’s one time programmable processors and their straightforward API. Microchip has roughly a 50% market share for 8-bit processors and over 90 of its microcontrollers ship with some analog component. It also ships a microcontroller with flash memory. It has built a good developer community with over 3,000 embedded designers attending its’ thirteen separate 2007 conferences held in four different languages in seven countries.

It released a 16-bit product in 2003 and a 32-bit product in December of 2007; which both use the same development tools as it’s widely used 8-bit version. Microchip is the only microcontroller vendor supporting 8-bit, 16-bit, and 32-bit products on one development environment. Its 32-bit microcontroller, the PIC32 Family, uses the MIPS the MIPS architecture and was on EDN Magazine’s prestigious list of “Hot 100 Products of 2007″.

Microchips generic processors will never come close to the performance of PLDs, but it should continue to see success in products with lower performance requirements.

ARM Holding’s processors are the dominant processor for mobile phones and the most widely-used 32-bit microprocessor family with over 75% of all 32-bit embedded CPUs. Arm processors are soft core IP designs that can be embedded in ASICs or FPGAs and are really complimentary to hardware provider’s offerings.

Intel’s x86 processor has a large community, but an inherently slow architecture that has not seen very much success outside of the mainstream PC and server marketplace. Intel is creating a multi-purpose “programmable Intel architecture machine” called Larrabee for high-performance computing and discrete graphics. Larrabee will be Intel’s first “many-core” product” and is expected to be available in 2010. It is debatable how competitive this device will be with the devices in the market two years from now. In the meantime, how much embedded systems market share can the PLD vendors capture?

Texas Instruments‘ is the leading DSP platform with over 50% market share and is also a leading player in the high performance analog chip market. TI risks losing market share from several diverse competitors nipping at its heals such as platform PLDs targeted at DSPs and mixed signal devices, lower end device providers from China such as Vimicro incorporating custom and 3^rd party IP, end market specific mixed signal competitors such as Sigma Design’s DSP, and finally seeing competition for its single chip mobile phone solution (integrated application processor, baseband, and support pieces).

Analog Devices nascent and somewhat beleaguered DSP processor platform Blackfin has some strong advocates and Microsoft’s .Net Micro Framework, which is targeted at embedded systems, was recently ported to Blackfin; increasing the toolset available for devices built around Blackfin

A 3rd party EDA tools vendor may develop a strong integrated meta-platform that can act as a neutral party and potentially support building devices on top of several different vendor’s platforms. Granted this sounds more like a pipe dream.

While Altera and Xilinx have great platforms with strong communities there are concerns that that the business model for intellectual property (IP) is poorly positioned. A considerable amount of IP is given away by the FPGA vendors which undercuts some potential IP vendor’s offerings. The FPGA vendors will have to regulate themselves to providing the framework IP allowing 3^rd party IP companies to provide important add on intellectual property.

As with any company developing a platform there are conflicts of interest that must be adroitly managed. Battles for platform supremacy often have winner take all outcomes with all other competitors left as niche players. The next decade will see further consolidation around very few design platforms.

Next Gen Semi Design (part 6) – Development Platforms

Xilinx and Altera have solid software design platforms that customers use to program their chips. The dynamics of the PLD industry give the top players competitive advantages due to the platform they each have created. Each platform has built a strong moat based on the number of integrated circuit design engineers that understand it (and whose careers are based on this knowledge) and the amount of intellectual property available.

Thousands and thousands of engineers make their living because of the knowledge and expertise they have of the development platforms they use. Switching costs are high for engineers to learn new design frameworks. In addition, thousands more engineers learn Xilinx and Altera’s development tools every year in colleges in the USA, India, China, and the rest of the world.

Most PLD’s are built using Xilinx or Altera’s development platform where they can also use thousands of IP cores (re-usable intellectual property) built by Xilinx or Altera (depending on whose platform you are using) and offered for free (or nearly free). Their platforms also support 3rd part IP cores.

Each company plus dozens of third party companies build re-usable components (IP cores) that increase engineers’ efficiency. For ASICs, the largest impediment to IP reuse is verification, which can consume 70% of the development cycle. With FPGAs reuse is easier as the FPGA vendors pre-verify 3rd party vendors IP.

The success of a design platform largely depends on the quality of the IP building blocks. A huge advantage that the PLD firms have over the EDA firms is a much easier migrating path from one manufacturing process to the next. This allows IP cores to be easily rolled into the next generation architecture.

The ASIC market has struggled to embed and verify 3^rd party IP. With Xilinx and Altera offering end-to-end design capabilities from design tools to IP cores, including free IP cores and a marketplace for 3^rd party IP cores, they are creating an ecosystem where the customer’s have one neck to choke when problems arise. Creating an environment similar to IT departments’ migration to a single primary provider (Microsoft, Oracle, IBM, or SAP) so they can have a primary partner to lean on when issues arise.

PLD’s allow IP cores to be embedded at the software level, not in the hardware. This simplifies the process so IP can be tested and verified by the supplier on a finite number of chips since FPGA’s are a common single chip manufactured in volume by the fab; as opposed to ASIC’s whose physical design is dictated by the IP cores themselves.

A behavioral change is needed to design embedded systems and programmable chips offer a different development paradigm. The Internet and web programming could never have moved as fast as it had if websites had to be bug-free when first released, a requirement for ASICs.

Having IP that is available, certified, and supported is a necessity. Programmers on the Java EE and .Net platforms are offered thousands of tested and supported libraries. This is a basic requirement of any enterprise development platform. IP sub-systems (objects) must offer easily understandable interfaces (API’s) that allow the designer to focus only on integration and their designs differentiating factor.

A serious question mark is how can EDA vendors build an evolvable design platform incorporating IP cores that can subsist across multiple ASIC generations. FPGA’s allow the platform to be based on single chip architecture, similar to how the x86 platform enabled the emergence of the PC.

Every year more IP cores are built and more engineers learn these two companies’ platforms. It would be hard for new entrants to overcome the platform network effects that have been built by Xilinx or Altera. It would be nearly impossible for a startup PLD company to compete with this breadth of knowledge. The ability of Xilinx and Altera to build developer ecosystems may eventually trump all but the highest end digital and mixed signal chips.

Next Gen Semi Design (part 5) – Xilinx & Altera

Xilinx has a customer base more diverse across industries and while Xilinx’s competing chips often offer better performance Altera has won several recent design wins because of its focus on lower power (and correspondingly better battery life). Both use a fabless model which keeps capex requirements low and taxes low, due to products being manufactured overseas. Both companies have high margins, no debt, and around $1B in cash.

 

Company		Symbol		Mkt Cap		Net Cash		2008 P/E		2007 P/CF	ROE	Net Margin	Yield	Growth
Xilinx		XLNX		$7B		$1B		15		14	21	20	2%	15%
Altera		ALTR		$6B		$1B		16		25	24	23	1%	15%

 

The leading PLD vendors will stay at the cutting edge of manufacturing processes. When a fab begins a new, smaller fabrication process they like to use PLD’s as one of the first chips they manufacture because they are high volume with relatively straight forward manufacturing designs. Setting up the fabrication process for microprocessors and ASICs are much more difficult, and getting more and more difficult with each new smaller geometry. The latest FPGA products are at least one or two generations ahead of any ASIC products. It is a safe bet that Xilinx and Intel will both remain at the cutting edge in manufacturing processes.

Xilinx Overview

Founded in 1984 and public since 1990, at $.83 a share when adjusted for splits. Every year for the past decade Xilinx has generated positive free cash flow, including in 2001 and 2002. It has a global customer base of over 21,000 customers (top 15 customers account for 33% of sales). It sources semiconductor wafers form multiple suppliers.

Xilinx has a little over 50% share of the PLD market. It is the 3rd largest company in the overall logic market. In 2007, a survey of semiconductor customers ranked Xilinx, for the first time, as the most important vendor, ahead of IBM or Intel. Over the past decade it has slowly been moving up the list on this survey.

Xilinx’s Virtex FPGA’s can include up to two embedded IBM PowerPC cores, offering embedded system designers the ability to build a system-on-a-chip capable of running an embedded OS like Linux. It has been making solid progress in the high performance DSP market as well as the embedded processor market. It offers an embedded development kit based on the Eclipse framework.

Xilinx currently trades at an opportunistic valuation with a 2008 P/E of less than 15. It has a ROE and net margin around 20. Including investments and subtracting a billion dollar convertible the company has a net cash position of one billion. This cash position has been shrinking as the company buys back shares. I have modeled revenue growth of 12% and earnings growth of 15% (due to share buybacks and margin improvements) over the next five years. Altera’s valuation is very similar.

Altera Overview

Altera was founded in 1983 and has been public since 1989. It has a global customer base of over 14,000 electronics equipment makers. It uses a single source, Taiwan Semiconductor, for its semiconductor wafers; subjecting the company to any potential production issues incurred by Taiwan Semiconductor.

Next Gen Semi Design (part 4) – PLD Market

The Programmable Logic Market

Programmable logic devices (PLDs) are semiconductor logic blocks that can be programmed after they are manufactured. The most common PLDs are Field-Programmable Gate Array (FPGAs). As integrated circuits become more complex FPGAs become more cost effective in electronic devices within communications, storage, industrial, consumer electronics and other end product markets. PLD chips will always be larger and slower than ASICs, but as more focus and energy is expended on design, more designs move to PLD.

 

 

“The cost of developing an ASIC, in general, doubles every generation. On 180nm, it was US$7-8 million, on 90nm it was in the neighborhood of US$40 million. As of yet, there are no ASICs on 65nm, but the development costs would be US$70-80 million.”

    -Xilinx CEO Wim Roelandts, Apr 2007

The programmable logic device (PLD) market is a duopoly with Xilinx and Altera controlling 85% of the market. From design win to customer beginning volume production can be two years so market share is a lagging indicator, but by all accounts Xilinx and Altera appear to be continuing to gain market share. An FPGA family typically reaches peak sales four to five years after introduction.

These two companies have taken a billion dollar of revenue from ASIC vendors over the past five years. The PLD market has grown a little less than 10% annually the past three years, but the market is expected to grow 10 – 15% annually over the next five years and the top two firms should grow earnings even faster. With the growth of embedded systems and the utilization of communication systems it is possible that the programmable logic market’s growth could even accelerate further. However, it may be a couple years before the PLD market growth begins accelerating.

In the Programmable Logic Device (PLD) market Xilinx and Altera are followed by Lattice with 7% market share, Actel with 6%, and Quicklogic with 1%. Over the next few years Xilinx and Altera should not lose or gain meaningful market share. These companies will grow because the four billion dollar PLD market is growing within the $72 billion semiconductor logic industry. PLD’s are receiving major designs wins in the overall semiconductor logic market specifically in products that used to be serviced by Application Specific Standard Products (ASSP) and the Application Specific Integrated Circuit (ASIC).

Every year PLD’s make more economic sense as designing and manufacturing semiconductor devices become more time consuming and more expensive. Initially just a prototyping tool, PLD’s can now cost effectively ramp up to 100,000′s of units. Some low cost PLD’s such as Altera’s FPGA Cyclone® series are now in devices selling in the low millions of units a year.

PLD’s offer a much more stable platform than other logic choices such as ASIC’s or ASSP where the devices have to be re-designed and re-tested every couple years. This can be a problem for products such as automobiles which typically are not re-designed more than once or twice per decade.

As more chips are embedded in different products the addressable PLD markets expands. The volume point where ASIC’s are more cost effective over PLD’s is now almost 100,000 units, five years ago it was 10,000 units. Due to this PLD is taking market share from the ASIC industry and ASSP industry.

While ways to measure semiconductor markets can vary widely the current markets that PLD can and is moving into are the ASIC market valued around roughly $15B, the ASSP market valued around roughly $15B, the very high performance DSP market valued around $3B, and the embedded processor market valued around $3B. If one was to include some of the high performance ASSP vendors such as Broadcom in the ASSP market it could be valued much higher (potentially around $45B), but the PLD vendors are not about to compete with these products.

Top Semiconductor Companies

In conjunction with the micro-chunking of my paper on the next generation of semiconductor design I’ve compiled a list of the top semiconductor companies based on their market capitalization at the end of 2007.

I have not included vertically integrated companies like: Samsung, Toshiba, IBM, Hitachi, Sharp, Philips/NXP, etc. I’ve also excluded companies not listed in the West like: Renesas, Hynix, and Freescale. Based on how poor the memory market has been and typically is I’m not sure Renesas and Hynix would make the list and Freescale’s market share has been dropping so they would not be in the top 20.

 

Size	2007 Results	Symbol	Mkt Cap	Revenue	Profits	Industry Segment
1	Intel	INTC	113	37.3	6.3	Processors
2	Taiwan Semiconductor	TSM	45.5	9.7	3.9	Fab
3	Texas Instraments	TXN	41	13.7	2.6	Analog & DSP
4	Applied Materials	AMAT	24.2	9.7	1.7	Assemby & Test
5	Freescale Semiconductor	(private)	16.5	5.7	n/a	Semiconductor Devices
6	MEMC Electronics Materials	WFR	14.9	1.8	0.6	Assemby & Test
7	Nvidia	NVDA	13.5	3.8	0.7	Graphics
8	Broadcom	BRCM	12.5	3.7	0.4	Networking
9	STMicroeletronics	STM	11	9.9	0.8	Semiconductor Devices
10	ASML Holdings	ASML	11	4.5	0.8	Assemby & Test
11	Analog Devices	ADI	8.3	2.6	0.55	Analog
12	KLA-Tencor	KLAC	7.9	2.8	0.5	Assemby & Test
13	United Microeletronics	UMC	7.7	3.4	1	Fab
14	Infineon	IFX	7.3	10.2	-0.5	Semiconductor Devices
15	Sandisk	SNDK	6.4	3.8	0.1	Memory
16	Marvell Technology	MRVL	6.4	2.7	-2	Semiconductor Devices
17	Maxim	MXIM	6.4	1.7	0.5	Analog
18	Xilinx	XLNX	6.2	1.8	0.4	Programmable Devices
19	Linear Technology	LLTC	6.2	1.1	0.4	Analog
20	Microchip Technology	MCHP	6.2	1	0.3	Processors
21	Altera	ALTR	5.9	1.3	0.3	Programmable Devices
22	LAM Research	LRCX	5.4	2.4	0.6	Assemby & Test
23	Micron	MU	4.9	5.7	-0.7	Memory
24	National Semiconductor	NSM	4.9	1.9	0.3	Analog
25	Advantest	ATE	4.8	2	0.3	Assemby & Test
26	Advanced Semiconductor	ASX	4.5	3.1	0.6	Packaging & Testing
27	Siliconware Precision	SPIL	4	1.8	0.4	Packaging & Testing
28	AMD	AMD	3.9	6	-2	Processors
29	Novellus Systems	NVLS	2.9	1.7	0.2	Assemby & Test
30	Intersil	ISIL	2.9	0.7	0.1	Analog
31	LSI	LSI	2.8	2.4	-0.4	ASIC
32	ARM Holdings	ARMHY	2.8	0.5	0.1	Processors

Next Generation of Semiconductor Design (part 1)

I recently finished a paper on investment opportunities in the next generation of semiconductor design and how it favors Xilinx, Altera, and to a lesser extent Microchip. Since this is a blog I will micro-chunk the papers content over several posts. The thesis of this paper is that semiconductor design will be based more around an integrated design and manufacturing platform than the historical approach of cobbling together various vendors’ offerings based on best of breed research. Similar to how IT departments have consolidated around only a handful of vendors semiconductor designers are consolidating around the major vendors’ platforms.

Since the bursting of the .com and telecom bubbles in 2000 the technology infrastructure market has evolved from a high growth industry into the cash cow phase. Winners such as Cisco, EMC, and Xilinx have tremendous free cash flow. While losers like 3Com and LSI are struggling to survive. With technology products especially there is little value purchasing second tier products so the leading companies only grow stronger until the next major secular inflection point. New startups are reduced to only attack market niches. For digital semiconductor chips as well as IP networking and storage the next secular inflection point is probably a decade or more in the future.

In this paper (and subsequent blogs) I will explain how the structure of the semiconductor market is going vertical due to the dramatic increase in semiconductor complexity requiring semiconductor design integration and how this favors the two leading FPGA (Field Programmable Gate Array) companies. The next generation semiconductor products will be designed using Xilinx and Altera‘s platforms.

A major acceleration in growth of the FPGA market should occur in 2010 based on several factors listed below. The two companies that control approximately 85% of the FPGA (Field Programmable Gate Array) market are positioned to exploit this inflection point in growth.

• When 65nm devices go mainstream
  • FPGA’s as SoC (for embedded systems), especially with ARM and MIPS soft-core processors
  • The continued acceleration of FPGA’s stealing market share from ASICs and ASSPs
• FPGA’s in new markets
  • x86 servers and PCs
  • Industrial & Automotive
  • Consumer devices
• Beginning of construction for the next generation communication network driven by
  • The communication equipment is nearly half of the FPGA end market
  • The glut of dark fiber from the .com bubble will be in use
  • The explosion of true mobility due to 802.11n, WiMax, LTE, etc
  • The explosion of interactive TV (through high definition video over IP) enabled by fiber to the home
  • The virtualization of the data center, including desktops
• The end of the global slowdown, re-invigorating world-wide growth of capital goods products, which are increasingly designed with digital devices like FPGAs

Altera’s Q1 2008 Results

On Wednesday April 16, Altera, the second largest maker of programmable logic devices (PLD) reported Q1 2008 results which were better than expected. The PLD industry is a duopoly controlled by Altera and Xilinx. Xilinx reports next week on Wednesday.

 

Over the next few weeks I’ll be providing a lot of information on the PLD industry and why it is a great investment opportunity. Here is a brief overview of Altera’s results. Revenue and free cash flow were both very good. The next quarter should be good based on a solid book-to-bill, good guidance, growth from new products, and continued progress from the company’s cost structure optimization driven by the new CFO. With PLD’s good market position and Altera’s solid product lineup leading to accelerating design wins Altera is in a great position over the next several years.

Financial Numbers

• Revenue = $336.1M up 10%, up 4% Q/Q
• Net Income = $83.9M vs. $65.5 Q/Q
• EPS = $.27 vs. $.20 Q/Q
• Cash Flow from Operating Activities = $149.7M

Financial Highlights

• Book to Bill > 1
• Repurchased = 15.5M shares for $275M, over past 15 mo’s repurchased $1.5B in stock, average price = $20.44
• Increased dividend to $.05/ share, from $.04/share
• Cash = $995M / LT Debt = $350M
• CapEx = $3.7M
• TTM ROE = 26%
• Inventory (Month’s Supply on Hand): Altera = 1.8, Distribution = 1.2

Operational Highlights

• Altera’s Stratix® III FPGAs awarded International Engineering Consortium’s (IEC) DesignVision Award in semiconductor & IC category for high performance and low power high-end FPGAs
• Arria™ GX transceiver-based FPGA family received
  • Annual “Product of the Year” award for best value high-performance FPGA from EN-Genius Network
  • Named to EDN magazine’s “Hot 100 Products” list in digital and programmable ICs category
• Zero-power MAX® IIZ CPLDs received
  • 2008 Editor’s Choice Award by Portable Design magazine in programmable logic category
  • Product of the Year Award from Electronic Products China

Guidance Q2 2008

• Sequential Sales Growth = 1 – 4%
• Gross Margin = 65% (+/- .5%)
• R&D = $65 – 67M, SG&A = $63 – 65M, Other Income = $3M, Tax Rate = 16 – 17%
• Diluted Share Count = 305 – 310M